LMX2594RHAT

Texas Instruments
595-LMX2594RHAT
LMX2594RHAT

Mfr.:

Description:
Phase Locked Loops - PLL 15-GHz wideband PLLa tinum™ RF syn A 595-LMX2594RHAR

ECAD Model:
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In Stock: 5,252

Stock:
5,252 Can Ship Immediately
Factory Lead-Time:
18 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1   Maximum: 70
Unit Price:
$-.--
Ext. Price:
$-.--
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 250)
This Product Ships FREE

Pricing (CAD)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™
$152.00 $152.00
$127.28 $1,272.80
$121.10 $3,027.50
Full Reel (Order in multiples of 250)
$121.10 $30,275.00
† $8.50 MouseReel™ fee will be added and calculated in your shopping cart. All MouseReel™ orders are non-cancellable and non-returnable.

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Phase Locked Loops - PLL
RoHS:  
Wideband PLL
1 Circuit
1.4 GHz
5 MHz
10 MHz to 15 GHz
3.45 V
3.15 V
Si
- 40 C
+ 85 C
SMD/SMT
VQFN-40
Reel
Cut Tape
MouseReel
Brand: Texas Instruments
Country of Assembly: TH
Country of Diffusion: DE
Country of Origin: TH
Moisture Sensitive: Yes
Operating Supply Current: 340 mA
Operating Supply Voltage: 3.3 V
Product Type: PLLs - Phase Locked Loops
Series: LMX2594
Factory Pack Quantity: 250
Subcategory: Wireless & RF Integrated Circuits
Unit Weight: 89 mg
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CAHTS:
8542390000
CNHTS:
8542399000
USHTS:
8542310030
TARIC:
8542399000
MXHTS:
8542399999
ECCN:
EAR99

LMX2594 Wideband PLLatinum RF Synthesizer

Texas Instruments LMX2594 Wideband PLLatinum™ RF Synthesizer has integrated VCOs that can generate any frequency from 10MHz to 15GHz without using an internal doubler. This feature eliminates the need for sub-harmonic filters. The high-performance PLL with a figure of merit of –236dBc/Hz and high phase detector frequency can attain very low in-band noise and integrated jitter. The high-speed N-divider has no pre-divider, thus significantly reducing the amplitude and number of spurs. There is also a programmable input multiplier to mitigate integer boundary spurs.