25CS320T-H/ST

Microchip Technology
579-25CS320T-H/ST
25CS320T-H/ST

Mfr.:

Description:
EEPROM 32 Kbit SPI SERIAL EEPROM w/ECC, 8-TSSOP T&R, 150C Ext Temp

Lifecycle:
New Product:
New from this manufacturer.
Datasheet:
ECAD Model:
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More Information
Learn more about Microchip Technology 25CS320T-H/ST
This product may require additional documentation to export from the United States.

In Stock: 2,500

Stock:
2,500 Can Ship Immediately
Factory Lead-Time:
7 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
$-.--
Ext. Price:
$-.--
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 2500)

Pricing (CAD)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™ †
$1.08 $1.08
$1.07 $10.70
$1.04 $26.00
$0.99 $99.00
Full Reel (Order in multiples of 2500)
$0.99 $2,475.00
† $8.50 MouseReel™ fee will be added and calculated in your shopping cart. All MouseReel™ orders are non-cancellable and non-returnable. ↩

Product Attribute Attribute Value Select Attribute
Microchip
Product Category: EEPROM
Delivery Alerts:
 This product may require additional documentation to export from the United States.
RoHS:  
32 kbit
SPI
20 MHz
4 k x 8
TSSOP-8
20 ns
1.7 V
5.5 V
SMD/SMT
200 Year
- 40 C
+ 150 C
Reel
Cut Tape
MouseReel
Active Read Current - Max: 5 mA
Brand: Microchip Technology
Country of Assembly: Not Available
Country of Diffusion: Not Available
Country of Origin: TH
Operating Supply Current: 10 uA
Product Type: EEPROM
Factory Pack Quantity: 2500
Subcategory: Memory & Data Storage
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Attributes selected: 0

Datasheet

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USHTS:
8542320051
TARIC:
8542327500
ECCN:
3A001.A.2.A

25CS320 32-Kbit SPI Serial EEPROM

Microchip Technology 25CS320 32-Kbit SPI Serial EEPROM uses an SPI-compatible bus organized into 4096 bytes of 8-bits each (4KB). Microchip Technology 25CS320 is designed for consumer, industrial, and automotive applications and offers reliable, nonvolatile memory storage with a wide operating voltage range of 1.7V to 5.5V. The device requires a clock input (SCK), data input (SI), and data output (SO) lines, with access controlled via a Chip Select (CS) input. It also features a pause function, allowing the host to handle higher-priority tasks while ignoring input transitions, except for Chip Select.

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